? semiconductor components industries, llc, 2011 march, 2011 ? rev. 2 1 publication order number: NCN7200/d NCN7200 gigabit ethernet lan switch with 2:1 mux/ demux and power-down feature the NCN7200 is pin ? compatible to the pi3l720zhe and comes in a 42 ? pin wqfn package (3.5 mm x 9 mm x 0.5 mm pitch). the NCN7200 is an 8 ? channel, bidirectional switch with a power shutdown feature that puts all outputs in a high ? impedance state. the switch is compatible with 10/100/1000 base ? t ethernet standards. the device has 3 additional lines for status indicator leds which are switched together with the ethernet pairs. features ? 2:1 mux/ demux lan switch ? three extra channels facilitate led switching ? fully specified for power supply range: 3 v to 3.6 v ? powerdown feature conserves energy ? esd protection ? 8 kv hbm (human body model, i/o to gnd) ? 10 kv contact discharge (iec61000 ? 4 ? 2) ? low crosstalk: ? 70 db ? pin ? to ? pin replacement for pi3l720zhe ? this is a pb ? free device typical applications ? routes signals for 10/100/1000 mbps ethernet ? facilitates docking system by interfacing one controller to dual connectors wqfn42 case 510ap marking diagram http://onsemi.com 1 a = assembly location wl = wafer lot yy = year ww = work week g = pb ? free package NCN7200 awlyywwg see detailed ordering and shipping information in the package dimensions section on page 9 of this data sheet. ordering information
NCN7200 http://onsemi.com 2 figure 1. detailed block diagram a0+ b0+ a0 ? b0 ? c0+ c0 ? . . a3+ b3+ a3 ? b3 ? c3+ c3 ? leda0 leda1 leda2 sel pd ledb0 ledc0 ledb1 ledc1 ledb2 ledc2 power down . . . . truth table pd sel function l l ax to bx; ledax to ledbx l h ax to cx; ledax to ledcx h x hi ? z
NCN7200 http://onsemi.com 3 figure 2. pin description (top view) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 38 18 19 20 21 42 41 40 39 ledb1 ledc0 ledc1 vdd leda2 ledb2 ledc2 vdd vdd b0+ b0 ? 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 exposed pad on underside a0+ a0 ? vdd pd a1+ a1 ? vdd a2+ a2 ? a3+ a3 ? sel vdd leda0 leda1 ledb0 c0+ c0 ? b1+ b1 ? c1+ c1 ? vdd b2+ b2 ? c2+ c2 ? b3+ b3 ? c3+ c3 ? (connect to gnd)
NCN7200 http://onsemi.com 4 pin description pin name description ax+, ax ? port a demux i/o bx+, bx ? port b mux i/o cx+, cx ? port c led mux i/o gnd ground ledzx led i/o pd powerdown, active high, with internal pulldown resistor sel select v dd power maximum ratings description value unit storage temperature ? 65 to +150 c supply voltage to ground potential ? 0.5 to +4.0 v dc input voltage ? 0.5 to +5.5 v dc output current (note 1) 120 ma power dissipation (note 1) 0.5 w stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may affect device reliability. 1. continuous short ? circuit operation to ground at elevated ambient temperature can result in exceeding the maximum allowed junction temperature of 150 c. output currents in excess of 45 ma over long term may adversely affect reliability. shorting output to either v+ or v ? will adversely affect reliability. gigabit ethernet lan switch with 2:1 mux/ demux and power down feature (min / max values are at v dd = 3.3 v 10%, t a = ? 40 c to +85 c. typ values are at v dd = 3.3 v and t a = 25 c) symbol description test conditions min typ max unit power supply characteristics (note 2) v dd power dc supply voltage 3.0 3.3 3.6 v i dd ? standby quiescent power supply current v dd = 3.6 v, v in = gnd or v dd 0.38 0.45 ma i dd ? active active power supply current v dd = 3.6 v, v in = v dd or gnd 1.0 1.5 ma i dd ? pd power down current p d = 1, v dd = 3.6 v, v in = v dd or gnd 0.13 0.16 ma 2. active power represents normal data communication. standby power is when the device is enabled for operation but there is no lan traff ic (cable not connected). power down current is the minimum power state used when not connected and mobile. 3. measured by the voltage drop between a and b pins at indicated current through the switch. on resistance is determined by the lower of the voltages on the two (a & b) pins. 4. guaranteed by design and/or characterization. 5. the bus switch contributes no propagational delay other than the rc delay of the on resistance of the switch and the load cap acitance. the time constant for the switch alone is of the order of 0.25 ns for 10 pf load. since this time constant is much smaller than the rise/fall times of typical driving signals, it adds very little propagational delay to the system. propagational delay of the bus switch when used in a system is determined by the driving circuit on the driving side of the switch and its interactions with the load on the drive n side.
NCN7200 http://onsemi.com 5 gigabit ethernet lan switch with 2:1 mux/ demux and power down feature (min / max values are at v dd = 3.3 v 10%, t a = ? 40 c to +85 c. typ values are at v dd = 3.3 v and t a = 25 c) symbol unit max typ min test conditions description control logic (sel and pd pins) dc electrical characteristics for 1000 base ? t ethernet switching v ih input high voltage guaranteed high level 2.0 v v il input low voltage guaranteed low level ? 0.5 0.8 v ik clamp diode voltage v dd = max, i in = ? 18 ma ? 0.7 ? 1.0 i ihsel input high current (sel) v dd = max, v in = v dd 0.1 a i ihpd input high current (pd) v dd = max, v in = v dd 1.2 i il input low current v dd = max, v in = gnd 0.1 i off off ? leakage current (sel) v dd = 0 v, v in = 0 v to v dd 0.1 data path (ax to bx, cx pins) dc electrical characteristics for 1000 base ? t ethernet switching r on switch on ? resistance (note 3) v dd = min, 1.5 v < v in < v dd , i tn = ? 40 ma 2.0 6.0 r flat(on) on ? resistance flatness (note 3) v dd = min, v in @ 1.5 v and v dd , i tn = ? 40 ma 0.3 r on on ? resistance match from center ports to any other port (note 3) v dd = min, 1.5 v < v in < v dd , i tn = ? 40 ma 0.5 1.0 i on on leakage current (ax) v dd = 3.6 v, v ax = 0 v or v dd , v out = float ? 0.1 +0.1 a i off off leakage current (ax/bx/cx) v dd = 3.6 v, v in = 0 v or v dd , v out = v dd or 0 v ? 0.1 +0.1 a data path (ledax to ledbx, ledcx pins) dc electrical characteristics for 1000 base ? t ethernet switching r on switch on ? resistance (note 3) v dd = min, 1.5 v < v in < v dd , i tn = ? 40 ma 7.0 16 r flat(on) on ? resistance flatness (note 3) v dd = min, v in @ 1.5 v and v dd , i tn = ? 40 ma 0.3 r on on ? resistance match from center ports to any other port (note 3) v dd = min, 1.5 v < v in < v dd , i tn = ? 40 ma 0.8 1.25 i on on leakage current (ledax) v dd = 3.6 v, v ax = 0 v or v dd , v out = float ? 0.1 +0.1 a i off off leakage current (ledax/ledbx/ledcx) v dd = 3.6 v, v in = 0 v or v dd , v out = v dd or 0 v ? 0.1 +0.1 a control logic (sel and pd pins) dc electrical characteristics for 10/100 base ? t ethernet switching v ih input high voltage guaranteed high level (control pins) 2.0 v v il input low voltage guaranteed low level (control pins) ? 0.5 0.8 v ik clamp diode voltage v dd = max, in = ? 18 ma ? 0.7 ? 1.0 i ihsel input high current (sel) v dd = max, v in = v dd 0.1 a i ihpd input high current (pd) v dd = max, v in = v dd 1.2 i il input low current v dd = max, v in = gnd 0.1 i off off ? leakage current (sel) v dd = 0 v, v in = 0 v to v dd 0.1 2. active power represents normal data communication. standby power is when the device is enabled for operation but there is no lan traff ic (cable not connected). power down current is the minimum power state used when not connected and mobile. 3. measured by the voltage drop between a and b pins at indicated current through the switch. on resistance is determined by the lower of the voltages on the two (a & b) pins. 4. guaranteed by design and/or characterization. 5. the bus switch contributes no propagational delay other than the rc delay of the on resistance of the switch and the load cap acitance. the time constant for the switch alone is of the order of 0.25 ns for 10 pf load. since this time constant is much smaller than the rise/fall times of typical driving signals, it adds very little propagational delay to the system. propagational delay of the bus switch when used in a system is determined by the driving circuit on the driving side of the switch and its interactions with the load on the drive n side.
NCN7200 http://onsemi.com 6 gigabit ethernet lan switch with 2:1 mux/ demux and power down feature (min / max values are at v dd = 3.3 v 10%, t a = ? 40 c to +85 c. typ values are at v dd = 3.3 v and t a = 25 c) symbol unit max typ min test conditions description data path (ax to bx, cx pins) dc electrical characteristics for 10/100 base ? t ethernet switching r on switch on ? resistance (note 3) v dd = min, 1.25 v < v in < v dd , i tn = ? 10 ma to ? 30 ma 2.0 6.0 r flat(on) on ? resistance flatness (note 3) v dd = min, 1.25 v < v in < v dd , i tn = ? 10 ma to ? 30 ma 0.8 r on on ? resistance match from center ports to any other port (note 3) v dd = min, 1.25 v < v in < v dd , i tn = ? 10 ma to ? 30 ma 0.8 1.3 i on on leakage current (ax) v dd = 3.6 v, v ax = 0 v or v dd , v out = float ? 0.1 +0.1 a i off off leakage current (ax/bx/cx) v dd = 3.6 v, v in = 0 v or v dd , v out = v dd or 0 v ? 0.1 +0.1 a data path (ledax to ledbx, ledcx pins) dc electrical characteristics for 10/100 base ? t ethernet switching r on switch on ? resistance (note 3) v dd = min, 1.25 v < v in < v dd , i tn = ? 10 ma to ? 30 ma 7.0 16 r flat(on) on ? resistance flatness (note 3) v dd = min, 1.25 v < v in < v dd , i tn = ? 10 ma to ? 30 ma 0.3 r on on ? resistance match from center ports to any other port (note 3) v dd = min, 1.25 v < v in < v dd , i tn = ? 10 ma to ? 30 ma 0.8 1.25 i on on leakage current (ledax) v dd = 3.6 v, v ax = 0 v or v dd , v out = float ? 0.1 +0.1 a i off off leakage current (ledax/ledbx/ledcx) v dd = 3.6 v, v in = 0 v or v dd , v out = v dd or 0 v ? 0.1 +0.1 a capacitance (ax to bx, cx and ledax to ledbx, ledcx pins) (note 4) c in input capacitance v in = 0 v, f = 1 mhz 3.0 4.0 pf c off(b1, b2) port b capacitance, switch off 5.0 7.0 c on(a/b) a/b capacitance, switch on 10.5 12 dynamic electrical characteristics (ax to bx and ledax to ledbx pins) (note 5) bw bandwidth ? 3 db r l = 100 (figure 3) 750 mhz o irr off isolation r l = 100 , f = 250 mhz (figure 7) ? 30 db xtalk crosstalk r l = 100 , f = 250 mhz (figure 8) ? 70 switching characteristics (ax to bx and ledax to ledbx pins) (notes 4 and 5) t pd propagation delay (figure 4) 0.3 ns t pzh , t pzl line enable time ? sel to an, bn (figure 4) 0.5 15 t phz , t plz line disable time ? sel to an, bn (figure 4) 0.5 25 t sk(o) output skew between center port to any other port 0.1 0.2 t sk(p) skew between opposite transitions of the same output (t hil , ? t plh ) 0.1 0.2 2. active power represents normal data communication. standby power is when the device is enabled for operation but there is no lan traff ic (cable not connected). power down current is the minimum power state used when not connected and mobile. 3. measured by the voltage drop between a and b pins at indicated current through the switch. on resistance is determined by the lower of the voltages on the two (a & b) pins. 4. guaranteed by design and/or characterization. 5. the bus switch contributes no propagational delay other than the rc delay of the on resistance of the switch and the load cap acitance. the time constant for the switch alone is of the order of 0.25 ns for 10 pf load. since this time constant is much smaller than the rise/fall times of typical driving signals, it adds very little propagational delay to the system. propagational delay of the bus switch when used in a system is determined by the driving circuit on the driving side of the switch and its interactions with the load on the drive n side.
NCN7200 http://onsemi.com 7 figure 3. bandwidth output dut input 50 vna return port 2 50 vna source port 1 reference 50 control line figure 4. three ? state and t pd test setup 1.2 v d.u.t. pulse generator 200 10pf c l 50 200 v out v in figure 5. three ? state timing diagram v dd r p open sel output v oh v oh v ol v ol 0 v 2.5 v v ol + 0.3v v oh ? 0.3v output sel t pzl t pzh t plz t phz v dd/2 v dd/2 1.25 v 1.25 v switch positions test switch t plz , t pzl (output on b ? side) 1.2 v t phz , t pzh (output on b ? side) gnd t pd open v cc gnd analog in analog out 50% t pd(lh) t pd(hl) 50% v out figure 6. propagation delay
NCN7200 http://onsemi.com 8 figure 7. off ? isolation figure 8. differential crosstalk nc dut com 50 50 50 generator (force) sel no output (sense) transmitted v in+ 0.1 f port 1 NCN7200 network analyzer gnd v dd a0+ 50 v in ? port 2 a0 ? 50 v out+ port 3 b1+ 50 v out ? port 4 b1 ? 50 all unused i/o ports 50 pd sel +3.3v 0v or v dd 0 v differential crosstalk 20log v out v out v in v in measurements are standardized against shorts at ic terminals. differential crosstalk is measured between any two non ? adjacent pairs.
NCN7200 http://onsemi.com 9 application information logic inputs the logic control inputs can be driven up to +3.6 v regardless of the supply voltage. for example, given a +3.3 v supply, the output enables or select pins may be driven low to 0 v and high to 3.6 v: driving the control pins to the rails minimizes power consumption. power ? supply sequencing proper power ? supply sequencing is advised for all cmos devices. it is recommended to always apply v dd before applying signals to the input/output or control pins. ordering information device package shipping ? NCN7200mttwg wqfn42 (pb ? free) 2000 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d.
NCN7200 http://onsemi.com 10 package dimensions wqfn42 3.5x9, 0.5p case 510ap ? 01 issue o notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. dimension b applies to plated terminal and is measured between 0.15 and 0.30 mm from terminal tip. 4. coplanarity applies to the exposed pad as well as the terminals. ?? ?? ?? ?? a d e b c 0.15 pin one reference top view side view bottom view a k d2 e2 c c 0.15 c 0.10 c 0.08 a1 seating plane e 42x note 3 b 42x 0.10 c 0.05 c a b b dim min max millimeters a 0.70 0.80 a1 0.00 0.05 b 0.20 0.30 d 3.50 bsc d2 1.95 2.15 e 9.00 bsc e2 7.45 7.65 e 0.50 bsc k 0.20 ??? l 0.30 0.50 22 38 42x 0.50 pitch 3.80 0.63 9.30 dimensions: millimeters 0.35 42x 1 l a3 0.20 ref recommended note 4 a3 detail b 2.16 1 package outline detail a e/2 l1 detail a l alternate terminal constructions l 0.00 0.15 17 mounting footprint* 0.10 c a b 0.10 c a b *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5773 ? 3850 NCN7200/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative
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